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  ?2010-2012 peregrine semiconductor corp. all rights reserved. page 1 of 12 document no. 70-0299-08 | www.psemi.com features ?? harp? technology enhanced ?? fast settling time ?? eliminates gate and phase lag ?? no drift in insertion loss and phase ?? high linearity: 58 dbm iip3 ?? low insertion loss: 0.8 db @ 3 ghz, 1.0 db @ 6 ghz and 1.2 db @ 8 ghz ?? high isolation: 45 db @ 3 ghz, 39 db @ 6 ghz and 31 db @ 8 ghz ?? maximum power handling: 30 dbm @ 8 ghz ?? absorptive switch design ?? high esd tolerance of 2kv hbm on rfc and 1kv hbm on all other pins pe42540 ultracmos ? sp4t rf switch 10 hz - 8 ghz, absorptive the pe42540 is a harp? technology-enhanced absorptive sp4t rf switch developed on ultracmos ? process technology. this switch is designed specifically to support the requirements of the test equipment and ate market. it is comprised of four symmetric rf ports and has very high isolation. an on-chip cmos decode logic facilitates a two-pin low voltage cmos control interface and an optional external vss feature. high esd tolerance and no blocking capacitor requirements make this the ultimate in integration and ruggedness. the pe42540 is manufactured on peregrine?s ultracmos ? process, a patented variation of silicon-on- insulator (soi) technology on a sapphire substrate, offering the performance of gaas with the economy and integration of conventional cmos. figure 1. functional diagram rf4 rf1 rf3 cmos control/ driver and esd v dd v1 rf2 v2 esd 50 esd 50 esd 50 esd 50 vss ext rf c figure 2. package type 32-lead 5x5 mm lga product description product specification 71-0067
document no. 70-0299-08 | ultracmos ? rfic solutions page 2 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification table 1. electrical specifications @ 25c, v dd = 3.3v, vss ext = 0v (z s = z l = 50 ? ) parameter condition min typ max unit operating frequency 10 hz 1 8 ghz rfc-rfx insertion loss 10 hz-9 khz 3000 mhz 6000 mhz 7500 mhz 8000 mhz 0.7 0.8 1.0 1.1 1.2 1.0 1.1 1.3 1.5 1.6 db db db db db rfx-rfx isolation 10 hz-9 khz 3000 mhz 6000 mhz 7500 mhz 8000 mhz 70 40 34 27 25 80 45 39 32 31 db db db db db rfc-rfx isolation 10 hz-9 khz 3000 mhz 6000 mhz 7500 mhz 8000 mhz 74 40 28 24 21 84 45 33 29 27 db db db db db return loss (rfc to active port) 10 hz-9 khz 3000 mhz 6000 mhz 7500 mhz 8000 mhz 24 23 18 14 13 db db db db db return loss (terminated port) 10 hz-9 khz 3000 mhz 6000 mhz 7500 mhz 8000 mhz 35 18 13 11 10 db db db db db settling time 50% ctrl to 0.05db final value (-40 to 85 oc) rising edge 50% ctrl to 0.05db final value (-40 to 85 oc) falling edge 14 15 18 45 s s switching time (t sw ) 50% ctrl to 90% or 10% rf 5 8 s p1db 1 input 1 db compression rfx-rfc all bands @ 1:1 vswr, 100% duty cycle 31 33 dbm input ip3 8000 mhz 58 dbm input ip2 8000 mhz 100 dbm note 1: maximum operating pin (50 ? ) is shown in table 3. please refer to figures 4, 5, and 6 when operating the part at low frequency
?2010-2012 peregrine semiconductor corp. all rights reserved. document no. 70-0299-08 | www.psemi.com pe42540 page 3 of 12 product specification figure 3. pin configuration (top view) pin # pin name description 1, 3-6, 8, 9-12, 14-17, 19-22, 24-26, 28, 32 gnd ground 2 rf4 2 rf i/o 7 rf2 2 rf i/o 18 rf1 2 rf i/o 23 rf3 2 rf i/o 27 v dd supply 29 v1 switch control input, cmos logic level 30 v2 switch control input, cmos logic level 31 vss ext 1 external vss negative voltage control paddle gnd exposed solder pad: ground for proper operation 13 rfc 2 rf common table 2. pin descriptions notes: 1. use vss ext (pin 31, vss ext = -v dd ) to bypass and disable internal negative voltage generator. connect vss ext (pin 31) to gnd (vss ext = 0v) to enable internal negative voltage generator 2. all rf pins must be dc blocked with an external series capacitor or held at 0 vdc table 3. operating ranges parameter min typ max unit v dd supply voltage 3.0 3.3 3.55 v vss ext negative power supply voltage 1 -3.6 -3.3 -3.0 v iss negative supply current -10 -40 a i dd power supply current v dd = 3.3v, vss ext = 0v, temp = 85c 90 160 a i dd power supply current v dd = 3.6v, vss ext used 50 a v ctrl control voltage high 1.2 1.5 v dd v v ctrl control voltage low 0 0 0.4 v i ctrl control current 1 a p in thru path 2 (50 ? , rf power in) 9 khz - 8 ghz figs. 4,5 , 6 p max max power into termination (50 ? ) 9 khz 6 mhz 2,3 6 mhz - 8 ghz 2,3 figs. 4,5 , 6 20 dbm p max max power, hot switching (50 ? ) 9 khz 6 mhz 2,3 6 mhz - 8 ghz 2,3 figs. 4,5,6 20 dbm t op operating temperature range -40 +85 c notes: 1. applies only when extern al vss power supply is used. otherwise, vss ext = 0 2. 100% duty cycle (-40 to +85 c, 1:1 vswr) 3. do not exceed 20 dbm g n d g n d g n d g n d g n d r f c g n d g n d g n d g n d v s s e x t v 2 v 1 g n d v d d g n d
document no. 70-0299-08 | ultracmos ? rfic solutions page 4 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification exceeding absolute maximum ratings may cause permanent damage. operation should be restricted to the limits in the operating ranges table. operation between operating range maximum and absolute maximum for extended periods may reduce reliability. electrostatic discharge (esd) precautions when handling this ultracmos ? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the specified rating. latch-up avoidance unlike conventional cmos devices, ultracmos ? devices are immune to latch-up. switching frequency the pe42540 has a maximum 25 khz switching rate when the internal negative voltage generator is used (pin 31 = gnd). the rate at which the pe42540 can be switched is only limited to the switching time ( table 1 ) if an external negative supply is provided at (pin 31 = vss ext ). table 5. truth table state v1 v2 rf1 on 0 0 rf2 on 1 0 rf3 on 0 1 rf4 on 1 1 spurious performance the typical spurious performance of the pe42540 is -144 dbm when vss ext = 0v (pin 31 = gnd). if further improvement is desired, the internal negative voltage generator can be disabled by setting vss ext = -v dd . moisture sensitivity level the moisture sensitivity level rating for the pe42540 in the 32-lead 5x5 mm lga package is msl3. optional external vss control (vss ext ) for proper operation, the vss ext control pin must be grounded or tied to the vss voltage specified in table 3 . when the vss ext control pin is grounded, fets in the switch are biased with an internal voltage generator. for applications that require the lowest possible spur performance, vss ext can be applied externally to bypass the internal negative voltage generator. table 4. absolute maximum ratings parameter/condition min max unit t st storage temperature range -60 +150 c v dd supply voltage -0.3 4 v v ctrl control voltage, v1 and v2 4 v p in thru path (50 ? , rf power in) 9 khz - 8 ghz figs. 4,5 , 6 p max max power into termination (50 ? ) 9 khz 6 mhz 1 6 mhz - 8 ghz figs. 4,5 , 6 20 dbm v esd esd voltage hbm 2 rfc all pins 2000 1000 v v v esd esd voltage mm, all pins 3 100 v notes: 1. do not exceed 20 dbm 2. hbm, mil-std 883 method 3015.7 3. mm jedec jesd22-a115-a
?2010-2012 peregrine semiconductor corp. all rights reserved. document no. 70-0299-08 | www.psemi.com pe42540 page 5 of 12 product specification v dd vss ext minimum peak voltage at rf port maximum peak voltage at rf port 3.0 0.0 -0.2 1.2 3.0 -3.0 -0.6 1.6 3.3 -3.3 -0.3 1.3 3.5 -3.5 -0.1 1.1 3.6 -3.6 0.0 1.0 low frequency operation table 6 shows the minimum and maximum voltage limits when operating the device under various v dd and vss ext voltage conditions below 9 khz. refer to figures 4, 5, and 6 to determine the maximum operating power over the frequency range of the device. maximum operating power vs. frequency figures 4 , 5 , and 6 show the power limit of the device will increase with frequency. as the frequency increases, the contours and maximum power limit will increase as shown in the curves. table 6. instantaneous rf pin voltage limits for operation below 9 khz
document no. 70-0299-08 | ultracmos ? rfic solutions page 6 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification -15 -10 -5 0 5 10 15 20 25 30 35 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 input power (dbm) frequency (khz) vssext = -3 .0v , vdd = +3.0 v vssext = 0.0v, vdd +3.0v vssext= -3.5v, vdd=+3.5v -15 -10 -5 0 5 10 15 20 25 30 35 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 input power (dbm) frequency (khz) vssext = -3 .0v , vdd = +3.0 v vssext = 0.0v, vdd +3.0v vssext= -3.5v, vdd=+3.5v -15 -10 -5 0 5 10 15 20 25 30 35 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 input power (dbm) frequency (khz) vssext = -3.0v, vdd = +3.0v vssext = 0.0v, vdd +3.0v vssext= -3.5v, vdd=+3.5v figure 5. maximum operating power vs. frequency (t ambient = 50 o c) figure 4. maximum operating power vs. frequency (t ambient = 25 o c) figure 6. maximum operating power vs. frequency (t ambient = 85 o c)
?2010-2012 peregrine semiconductor corp. all rights reserved. document no. 70-0299-08 | www.psemi.com pe42540 page 7 of 12 product specification frequency (hz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) figure 7. insertion loss vs. v dd (temp = 25c, vss = 0) figure 8. insertion loss vs. temp (v dd = 3.3v, vss = 0) figure 10. isolation: rfx-rfx vs. v dd (temp = 25c, vss = 0) figure 9. insertion loss (temp = 25c, v dd = 3.3v, vss = 0) figure 12. isolation: rfx-rfc vs. v dd (temp = 25c, vss = 0) figure 11. isolation: rfx-rfx vs. temp (v dd = 3.3v, vss = 0)
document no. 70-0299-08 | ultracmos ? rfic solutions page 8 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification figure 13. isolation: rfx-rfc vs. temp (v dd = 3.3v, vss = 0) frequency (hz) figure 14. active port return loss vs. v dd (temp = 25c, vss = 0) frequency (hz) frequency (hz) frequency (hz) frequency (hz) frequency (hz) figure 15. active port return loss vs. temp (v dd = 3.3v, vss = 0) figure 17. terminated port return loss vs. temp (v dd = 3.3v, vss = 0) figure 16. terminated port return loss vs. v dd (temp = 25c, vss = 0) figure 18. rfc port return loss vs. v dd (temp = 25c, vss = 0)
?2010-2012 peregrine semiconductor corp. all rights reserved. document no. 70-0299-08 | www.psemi.com pe42540 page 9 of 12 product specification figure 20. linearity performance (temp = 25c, v dd = 3.3v, vss = 0) 0 20 40 60 80 100 120 10.0e+3 100.0e+3 1.0e+6 10.0e+6 100.0e+6 1.0e+9 10.0e + linearity [dbm] frequency [hz] nominal iip3 [dbm] nominal iip2 [dbm] frequency (hz) linearity (dbm) figure 19. rfc port return loss vs. temp (v dd = 3.3v, vss = 0) frequency (hz) 1.0e+10
document no. 70-0299-08 | ultracmos ? rfic solutions page 10 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification through line j6 j1 j4 1 1 3 3 5 5 7 7 2 2 4 4 6 6 8 8 10 10 12 12 14 14 13 13 9 9 11 11 j8 header 14 j2 c1 22pf c2 22pf j7 r3 0 ohm 1 gnd 2 rf4 3 gnd 4 gnd 5 gnd 6 gnd 7 rf2 8 gnd 17 gnd 18 rf1 19 gnd 20 gnd 21 gnd 22 gnd 23 rf3 24 gnd 25 gnd 26 gnd 27 vdd 28 gnd 29 v1 30 v2 31 vss 32 gnd 9 gnd 10 gnd 11 gnd 12 gnd 13 rfc 14 gnd 15 gnd 16 gnd u1 pe42540 j5 j3 r2 1m r4 0 ohm r5 0 ohm r6 0 ohm c3 22pf c4 22pf r1 1m c5 0.1uf c6 0.1uf rfc rf1 rf3 rf2 rf4 figure 22. evaluation board schematic 102-0612 figure 21. evaluation board layouts 101-0515 evaluation kit the sp4t switch ek board was designed to ease customer evaluation of peregrine?s pe42540. the rf common port is connected through a 50 ? transmission line via the top sma connector, j1. rf1, rf2, rf3 and rf4 are connected through 50 ? transmission lines via sma connectors j2, j4, j3 and j5, respectively. a through 50 ? transmission is available via sma connectors j6 and j7. this transmission line can be used to estimate the loss of the pcb over the environmental conditions being evaluated. the board is constructed of a four metal layer material with a total thickness of 62 mils. the dual clad top rf layer is rogers ro4003 material with an 8 mil rf core and er = 3.55. the middle layers provide ground for the transmission lines. the transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 15 mils, trace gaps of 10 mils, and metal thickness of 2.1 mils.
?2010-2012 peregrine semiconductor corp. all rights reserved. document no. 70-0299-08 | www.psemi.com pe42540 page 11 of 12 product specification top view bottom view side view recommended land pattern a 0.10 c (2x) c 0.10 c 0.05 c seating plane b 0.10 c (2x) 0.10 c a b 0.05 c all features 5.00 5.00 pin #1 corner 3.030.05 3.030.05 3.50 0.4350.050 (x32) 0.50 0.34 (x32) 0.260.05 (x32) 0.24 0.70 1.01 max 1 8 9 16 17 24 25 32 3.50 0.34 (x32) 3.08 3.08 4.90 4.90 0.50 (x28) detail a detail b 0.485 (x32) (x28) 0.11 0.10 0.10 0.535 0.04 0.15 detail a detail b 0.505 45 chamfer figure 23. package drawing figure 24. marking specifications 42540 yyww zzzzzz yyww = date code zzzzz = last six digits of lot number 17-0085 181-0022
document no. 70-0299-08 | ultracmos ? rfic solutions page 12 of 12 ?2010-2012 peregrine semiconductor corp. all rights reserved. pe42540 product specification tape feed direction notes: 1. 10 sprocket hole pitch cumulative tolerance 0.02 2. camber not to exceed 1 mm in 100 mm 3. material: ps + c 4. ao and bo measured as indicated 5. ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier 6. pocket position relative to sprocket hole measured as true position of pocket, not pocket hole ao = 5.25 0.05 mm bo = 5.25 0.05 mm ko = 1.1 0.05 mm figure 25. tape and reel drawing table 7. ordering information advance information : the product is in a formative or design stage. the datasheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification: the datasheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification: the datasheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a cnf (customer notification form). the information in this datasheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in dev ices or systems int ended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for dam ages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, ultracmos and utsi are registered trademarks and harp, multiswitch and dune are trademarks of peregrine semiconductor corp. sales contact and information for sales and contact information please visit www.psemi.com. order code description package shipping method pe42540lgbc-z pe42540 sp4t rf switch green 32-lead 5x5 mm lga 3000 units / t&r EK42540-03 pe42540 evaluation ki t evaluation kit 1 / box


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